COMPUTER SYSTEM

申请公布号：JP2000284981(A)

申请号：JP19990094334

申请日期：1999.03.31

申请公布日期：2000.10.13

申请人：

TOSHIBA CORP

发明人：MURAYAMA MASAYOSHI

分类号：G06F11/10;(IPC1-7):G06F11/10

主分类号：G06F11/10

摘要：PROBLEM TO BE SOLVED: To operate the generation of parity data at high speed by compact hardware. SOLUTION: An EEPROM controller 7 of this computer system is provided with a parity data generating circuit 72 which calculates parity for data in parity data generation units and a byte counter 73 which counts the parity data generating unit amounts, and which successively stores parity data in each parity data generation unit generated by the parity data generating circuit 72 in plural parity registers 32 in a register group 71.

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