Charge pump circuit and PLL circuit using the same
申请公布号:EP2290821(A1)
申请号:EP20100008303
申请日期:2010.08.09
申请公布日期:2011.03.02
发明人:YAMAGUCHI, KOUICHIRO
分类号:H03L7/089
主分类号:H03L7/089
摘要:<p>A charge pump circuit 31, and a PLL circuit using the charge pump circuit, according to the present invention, comprises a glitch compensation circuit 36 to compensate for a slow glitch which occurs along charging/discharging of electric charges in a parasitic capacitance. The glitch compensation circuit 36 includes a comparator 37, a latch circuit 38, a capacitor C1 and transistors Q9, Q10 serving as a charge/discharge device. The comparator 37 is operable to compare between given potentials and apply a logic output signal to the latch circuit 38, and the latch circuit 38 is operable, in response to an output of the comparator at a given timing, to instruct the charge/discharge device to perform a charge or discharge operation to charge or discharge the capacitor so as to allow a potential at a second output terminal to come close to a potential at a first output terminal or a potential at a designated node in a loop filter of the PLL circuit.</p>
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