INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFERSCALE SPACER,申请号US20060465706-传众专利搜索

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFERSCALE SPACER

申请公布号：US2008042245(A1)

申请号：US20060465706

申请日期：2006.08.18

申请公布日期：2008.02.21

申请人：

STATS CHIPPAC LTD.

发明人：LEE SANG-HO;HA JONG-WOO;PARK SOO-SAN

分类号：H01L23/12

主分类号：H01L23/12

摘要：An integrated circuit packaging system is provided including forming a first device wafer having a first backside and a first active side; forming a waferscale spacer wafer having a waferscale spacer and a first opening; mounting the waferscale spacer wafer on the first backside; and singulating an first integrated circuit die having the waferscale spacer from the first device wafer having the first backside with the waferscale spacer wafer thereon.