Delay locked loop using synchronous mirror delay
申请公布号:US2006139075(A1)
申请号:US20040021370
申请日期:2004.12.23
申请公布日期:2006.06.29
发明人:MINZONI ALESSANDRO
分类号:H03L7/06
主分类号:H03L7/06
摘要:A delay locked loop comprises a circuit configured to receive a clock signal, divide the clock signal by two to provide a divided clock signal, and mirror with respect to the divided clock signal a fractional portion of a feedback delay remaining after dividing the feedback delay by a multiple of a cycle of the clock signal to provide a first signal.
METHOD AND DEVICE FOR OUTPUTTING DIGITAL SIGNAL
DIGITAL TELEVISION BROADCASTING RECEIVER
OPTICAL LOW-PASS FILTER ATTACHING STRUCTURE FOR IMAGE PICKUP DEVICE
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
COMMUNICATION METHOD, COMMUNICATION SYSTEM, AND AUTOMATIC TELEPHONE ANSWERING UNIT
SOFT SWITCHING DC-DC CONVERTER
POSITIONING STRUCTURE OF CONNECTOR
DRAFT MECHANISM OF FINE SPINNING FRAME
SWITCHING POWER SUPPLY UNIT WITH CURRENT APPROXIMATING CIRCUIT