MANUFACTURE OF SEMICONDUCTOR DEVICE
申请公布号:JPS5673474(A)
申请号:JP19790150444
申请日期:1979.11.20
申请公布日期:1981.06.18
发明人:KIKUCHI KENICHI;OOTANI SHIYUNJI
分类号:H01L21/28;H01L21/338;H01L29/417;H01L29/80;H01L29/812
主分类号:H01L21/28
摘要:PURPOSE:To obtain a Schottky barrier FET with short gate length by a method wherein two walls consisting of two layers of an insulating film and a resist are formed at both sides of a region where electrode metal is selectively coated when a semiconductor substrate is covered with the metal selectively, and the metal is evaporated from a clearance between the walls. CONSTITUTION:An N type GaAs working layer 7 is gaseous-phase epitaxial-grown on a semi-insulating GaAs substrate 6, mesa-etched and formed in a fixed shape, and the whole surface containing the layer 7 is coated with an SiO2 film 8. A pattern of two photoresist films 9, 10 is made up on the film 8 at an interval, the film 8 is removed by means of etching using the pattern as a mask, and two walls 11, 12 consisting of both a film 8a and a film 9 and both a film 8b and a film 10 are built up. An AuGeNi group alloy is evaporated from the oblique direction using the walls as masks, source and drain electrodes 13, 14 are selectively made up on the layer 7, the alloy attached on the surfaces of the walls 11, 12 is removed, and Al is evaporated onto the exposing layer 7 from the vertical direction during that time, thus forming a Schottky gate electrode 15.
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