Phase locked loop wherein phase comparing and filtering are performed by microprocessor,申请号US19880247409-传众专利搜索

Phase locked loop wherein phase comparing and filtering are performed by microprocessor

申请公布号：US4864253(A)

申请号：US19880247409

申请日期：1988.09.21

申请公布日期：1989.09.05

申请人：

SIEMENS AKTIENGESELLSCHAFT

发明人：ZWACK, EDUARD

分类号：H03L7/085;H03L7/181

主分类号：H03L7/085

摘要：A phase-locked loop is formed by a series circuit of a counter, a register, an arithmetic unit, a low-pass filter, a PI-filter, and a voltage-controlled oscillator. The digital, internal clock signals generated by the oscillator are counted in a counter and are transferred into the register and stored as a current counter reading at points in time determined by time interval clock signals. For example, the time interval clock signals are acquired from reference clock signals by means of a divider and exhibit a lower frequency than the internal clock signals. A drive signal in digital form is determined in the arithmetic unit on the basis of the current counter reading, on the counter reading of the preceding evaluation interval, and on a rated value. This drive signal proceeds via a digital low-pass filter, PI-filter, and D/A converter to the control input of the oscillator, and controls the latter such that the internal clock signals coincide in phase with the reference clock signals.