Semiconductor device having multi-level wiring
申请公布号:US5391921(A)
申请号:US19930083322
申请日期:1993.06.29
申请公布日期:1995.02.21
发明人:KUDOH, OSAMU;OKADA, KENJI;SHIBA, HIROSHI;KATOH, TAKUYA
分类号:H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L23/48;H01L29/46;H01L29/54;H01L29/62
主分类号:H01L21/768
摘要:A semiconductor device that has a feature in the spatial relationship between the wiring in a multi-level wiring and the intermediate insulating films. In the lower part of the second and/or subsequent levels of wiring there exist intermediate insulating films that have a pattern which is the same as the pattern of the wiring. Because of this arrangement, the intermediate insulating film does not exist between the wiring on the same level. The first structure of the multi-level wiring has the intermediate insulating films formed in wall-like shape, with the lower end of the intermediate insulating films reaching an underlying insulating layer formed on the surface of the semiconductor substrate. The second structure of the multi-level wiring is a quasi air gap metallization structure. As a result of realization of such structures, in the semiconductor device according to the present invention, the parasitic capacitance due to the coupling capacitances between the wiring can be reduced compared with a semiconductor device that has a structure in which the spaces between the wiring are filled with the intermediate films.
Composite membrane and process for producing the same
Colored enamel composition for obtaining decorative layers of float glass sheets
Heat recovery through oxidation of elemental phosphorus in a fluidized bed
One-sided corrugated cardboard machine with suction device
Increasing the sugar content of plants
Universal matrix switching device
Vane angle changing device for an axial fluid machine
Display device module with multiple shelves
Refrigerant flow rate control device