Instruction merging optimization
申请公布号:US9513916(B2)
申请号:US201313790632
申请日期:2013.03.08
申请公布日期:2016.12.06
发明人:Gschwind Michael K.;Salapura Valentina
分类号:G06F9/30;G06F9/38
主分类号:G06F9/30
代理人:Cantor Colburn LLP ;Kinnaman, Jr. William A.
地址:Armonk NY US
摘要:A computer-implemented method includes determining that two or more instructions of an instruction stream are eligible for optimization, where the two or more instructions include a memory load instruction and a data processing instruction to process data based on the memory load instruction. The method includes merging, by a processor, the two or more instructions into a single optimized internal instruction and executing the single optimized internal instruction to perform a memory load function and a data processing function corresponding to the memory load instruction and the data processing instruction.
主权项:1. A computer-implemented method comprising: determining that two or more instructions of an instruction stream are eligible for optimization, the two or more instruction including a memory load instruction and a data processing instruction to process data based on the memory load instruction; merging, by a processor, the two or more instructions into a single optimized internal instruction, wherein the single optimized internal instruction comprises a single stored rename register identifier; storing the single optimized internal instruction in a single slot in an issue queue; and executing the single optimized internal instruction to perform a memory load function and a data processing function corresponding to the memory load instruction and the data processing instruction, the executing including executing the memory load instruction followed by the data processing instruction.