MICROCOMPUTER SYSTEM,申请号JP19800137426-传众专利搜索

MICROCOMPUTER SYSTEM

申请公布号：JPS5762443(A)

申请号：JP19800137426

申请日期：1980.09.30

申请公布日期：1982.04.15

申请人：

SHARP KK

发明人：TANAKA SHINICHI

分类号：G06F11/30;G06F9/40;G06F9/42

主分类号：G06F11/30

摘要：PURPOSE:To prevent abnormal loop operation only by adding a simple circuit by presetting a prescribed value in a stack register for the most significant digit of a nesting level by a subroutine return instruction. CONSTITUTION:In a stack register SR'n stored with the most significant digit of a nesting level, a prescribed value is preset by a subroutine return instruction. For example, an AND gate GRn is added to preset a value IN, preset by a microorder R of the return instruction, in the most significant digit stage SR'n of the stack register SR, and an OR gate Gon is also added to control which gate output is inputted to the most significant digit stage stack register SR'n, in addition to an AND gate Gcn where a call instruction C is inputted as well as other stages. The said set value IN is regarded as, for example, the starting address of a program, which is restarted to be reexecuted.