DUAL LINER SILICIDE,申请号US201514740987-传众专利搜索

DUAL LINER SILICIDE

申请公布号：US2016372380(A1)

申请号：US201514740987

申请日期：2015.06.16

申请公布日期：2016.12.22

申请人：

INTERNATIONAL BUSINESS MACHINES CORPORATION ;GLOBALFOUNDRIES Inc

发明人：Pranatharthiharan Balasubramanian;Xie Ruilong;Yeh Chun-Chen

分类号：H01L21/8238;H01L27/092;H01L29/417;H01L29/66

主分类号：H01L21/8238

地址：Armonk NY US

摘要：A method for fabricating a dual silicide device includes growing source and drain (S/D) regions for an N-type device, forming a protection layer over a gate structure and the S/D regions of the N-type device and growing S/D regions for a P-type device. A first dielectric layer is conformally deposited and portions removed to expose the S/D regions. Exposed S/D regions for the P-type device are silicided to form a liner. A second dielectric layer is conformally deposited. A dielectric fill is formed over the second dielectric layer. Contact holes are opened through the second dielectric layer to expose the liner for the P-type device and expose the protection layer for the N-type device. The S/D regions for the N-type device are exposed by opening the protection layer. Exposed S/D regions adjacent to the gate structure are silicided to form a liner for the N-type device. Contacts are formed.

主权项：1. A method for fabricating a dual silicide device, comprising: growing source and drain regions adjacent to a gate structure for an N-type device; forming a protection layer over the gate structure and the source and drain regions of the N-type device; growing source and drain regions adjacent to a gate structure for a P-type device; conformally depositing a first dielectric layer on the gate structure for the N-type and P-type devices; removing the first dielectric layer to expose the source and drain regions adjacent to the gate structure for the P-type device; siliciding exposed source and drain regions adjacent to the gate structure for the P-type device to form a silicided liner for the P-type device; conformally depositing a second dielectric layer on the gate structure for the N-type and P-type devices; forming a dielectric fill over the second dielectric layer; opening contact holes in the dielectric fill and through the second dielectric layer to expose the silicided liner for the P-type device and expose the protection layer for the N-type device; exposing the source and drain regions adjacent to the gate structure for the N-type device by opening the protection layer; siliciding exposed source and drain regions adjacent to the gate structure for the N-type device to form a silicided liner for the N-type device; and forming contacts in the contact holes down to the silicided liners of the P-type device and the N-type device.