ライトバック順序付けによるコヒーレンス制御,申请号JP20110210532-传众专利搜索

ライトバック順序付けによるコヒーレンス制御

申请公布号：JP5815349(B2)

申请号：JP20110210532

申请日期：2011.09.27

申请公布日期：2015.11.17

分类号：G06F12/08

主分类号：G06F12/08

摘要：<p>Interconnect circuitry configured to provide routes for interconnecting several initiator devices and at least one recipient device including a memory. At least one of the initiator devices has a cache for storing a local copy of a subset of data items stored in the memory. The interconnect circuitry includes: a plurality of input ports and at least one output port; a plurality of paths for transmitting the transaction requests between the inputs and the at least one output; coherency control circuitry for maintaining an order in which at least some of the transaction requests to a same data storage location proceed through the interconnect circuitry. The interconnect circuitry is configured not to control the writeback transaction requests with the coherency control circuitry, such that the writeback transaction requests proceed independently of transaction requests routed through the coherency control circuitry.</p>