半导体装置及其制造方法;SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME,申请号TW103114930-传众专利搜索

半导体装置及其制造方法;SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

申请公布号：TW201541643

申请号：TW103114930

申请日期：2014.04.25

申请公布日期：2015.11.01

申请人：

世界先进积体电路股份有限公司 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION

发明人：库马　拉胡尔 KUMAR, RAHUL;库马　马洛宜 KUMAR, MANOJ;许健 SHEU, GENE;杨绍明 YANG, SHAO MING;施　路迪 SIHOMBING, RUDY OCTAVIUS;李家豪 LEE, CHIA HAO;杜尙晖 TU, SHANG HUI

分类号：H01L29/78(2006.01);H01L21/28(2006.01)

主分类号：H01L29/78(2006.01)

代理人：洪澄文颜锦顺

地址：新竹县新竹科学工业园区园区三路123号 TW

摘要：本揭露提供一种半导体装置，包括：基底，具有主动区及终端区；磊晶层，设于基底上；多个第一沟槽，设于主动区之磊晶层中；多个第二沟槽，设于终端区之磊晶层中；布植阻挡层，形成于第一沟槽与第二沟槽之底部；衬层，具有第二导电型，且沿着第一沟槽与第二沟槽之侧壁顺应性形成；介电材料，填入第一沟槽与第二沟槽，且分别定义多个第一柱及多个第二柱；闸极介电层，设于磊晶层上；两个浮置闸极，形成于闸极介电层上；源极区，形成于浮置闸极之间；层间介电层及接触插塞。本揭露亦提供此半导体装置之制造方法。; an epitaxial layer of the first conductivity type over the substrate; a plurality of first trenches in the epitaxial layer of the active region; a plurality of second trenches in the epitaxial layer of the termination region; an implant blocker layer formed at bottoms of the first and second trenches; a liner of a second conductivity type different from the first conductivity type conformally formed along sidewalls of the first and second trenches; a dielectric material filled in the first and second trenches defining a plurality of first columns and a plurality second column, respectively; a gate dielectric layer over the epitaxial layer; two floating gates formed on the gate dielectric layer over opposite sides of a first column which is farthest away from the termination region; a source region formed between the floating gates; an inter-layer dielectric layer covering the gate dielectric layer and the floating gates; and a contact plug formed on the source region through the inter-layer dielectric layer. The present disclosure also provides a method for manufacturing the semiconductor device.