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Memory and method of operating the same

申请公布号:US9019740(B2)

申请号:US201213680547

申请日期:2012.11.19

申请公布日期:2015.04.28

申请人:
Shanghai Huahong Grace Semiconductor Manufacturing Corporation

发明人:Jiang Hong;Xu Yi;Xiao Jun;Kong Weiran;Li Binghan

分类号:G11C5/06;G11C7/18;H01L27/115;G11C7/00;G11C16/04;H01L21/28

主分类号:G11C5/06

代理机构:
Harness, Dickey & Pierce, P.L.C.

代理人:Harness, Dickey & Pierce, P.L.C.

地址:Shanghai CN

摘要:A memory includes an array of memory cells including a plurality of memory cells with a common source, wherein each of the plurality of memory cells with a common source includes two sub-memory cells, each of the sub-memory cells corresponds to a bit line, and the respective bits are electrically independent. Each of the sub-memory cells in the memory according to the disclosure corresponds to a bit line, and the respective bit lines are electrically independent, thereby effectively avoiding interference to other memory cells which will not be programmed during a program operation.

主权项:1. A memory, comprising an array of memory cells including a plurality of memory cells with a common source, wherein each of the plurality of memory cells with a common source includes two sub-memory cells, each of the sub-memory cells corresponds to a bit line, and the respective bit lines are electrically independent, and wherein each sub-memory cell comprises a diffusion area, and two adjacent sub-memory cells of two adjacent memory cells in the direction of a column of the array of memory cells share a diffusion area and a bit line.

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