High current capable access device for three-dimensional solid-state memory
申请公布号:US8767431(B2)
申请号:US201213358944
申请日期:2012.01.26
申请公布日期:2014.07.01
发明人:Franca-Neto Luiz M.
分类号:G11C5/06;G11C5/02;G11C7/18;G11C11/4097
主分类号:G11C5/06
代理人:Patterson & Sheridan, LLP
地址:Amsterdam NL
摘要:The present invention generally relates to three-dimensional arrangement of memory cells and methods of addressing those cells. The memory cells can be arranged in a 3D orientation such that macro cells that are in the middle of the 3D arrangement can be addressed without the need for overhead wiring or by utilizing a minimal amount of overhead wiring. An individual macro cell within a memory cell can be addressed by applying three separate currents to the macro cell. A first current is applied to the memory cell directly. A second current is applied to the source electrode of the MESFET, and a third current is applied to the gate electrode of the MESFET to permit the current to travel through the channel of the MESFET to the drain electrode which is coupled to the memory element.
主权项:1. A three-dimensional solid state array of memory cells, comprising: a three-terminal device; a first electrical connector coupled to the three-terminal device, the first electrical connector extending along a first axis and a second axis perpendicular to the first axis; a second electrical connector coupled to the three-terminal device; a memory cell coupled to second electrical connector, the memory cell disposed along the second axis; and a third electrical connector coupled to the memory cell, the third electrical connector extending along the second axis and along a third axis perpendicular to both the second axis and the first axis.
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