METHOD OF FABRICATING A GATE
申请公布号:US2013316514(A1)
申请号:US201313956482
申请日期:2013.08.01
申请公布日期:2013.11.28
发明人:KIM JONG-PIL;JANG YOUNG-GOAN;KIM DONG-WON;CHO HAG-JU
分类号:H01L21/28;H01L21/76
主分类号:H01L21/28
摘要:A method of fabricating a gate includes sequentially forming an insulation layer and a conductive layer on substantially an entire surface of a substrate. The substrate has a device isolation layer therein and a top surface of the device isolation layer is higher than a top surface of the substrate. The method includes planarizing a top surface of the conductive layer and forming a gate electrode by patterning the insulation layer and the conductive layer.