Semiconductor memory including control unit responsive to erase command to determine selection of redundant memory block
申请公布号:US8331151(B2)
申请号:US20100965951
申请日期:2010.12.13
申请公布日期:2012.12.11
发明人:SUDO NAOAKI
分类号:G11C11/34;G11C16/04
主分类号:G11C11/34
摘要:A semiconductor memory device includes a memory region including memory cells configured to store data, a redundant region including memory cells configured to store data, and a control unit. The control unit is responsive to an erase command to execute, prior to an erase operation corresponding to the erase command, an error detection operation on data read from the memory region to detect whether the memory region is a defective memory region to be replaced by the redundant region.