Network traffic shaping for reducing bus jitter on a real time controller,申请号US20100694348-传众专利搜索

Network traffic shaping for reducing bus jitter on a real time controller

申请公布号：US8295287(B2)

申请号：US20100694348

申请日期：2010.01.27

申请公布日期：2012.10.23

申请人：

CHANDHOKE SUNDEEP;NATIONAL INSTRUMENTS CORPORATION

发明人：CHANDHOKE SUNDEEP

分类号：H04L12/56

主分类号：H04L12/56

摘要：System and method for controlling access to a bus. A Network Interface (NI) is coupled to a memory via the bus, and receives a schedule to a Direct Memory Access (DMA) controller on the NI. The schedule indicates one or more timeslots reserved for transmission of deterministic data, and further indicates one or more available timeslots which are not reserved for transmission of deterministic data. The NI receives first data for transmission onto the bus, during a first timeslot of the available timeslots, where the first data are received in a non-deterministic manner, and determines that the first timeslot is a reserved timeslots based on the schedule. The first data are buffered in a buffer memory during the first timeslot, and transferred to the first memory via the bus during a second timeslot after the buffering, where the second timeslot is one of the one or more available timeslots.