Method for clamping a semiconductor region at or near ground,申请号US201113178302-传众专利搜索

Method for clamping a semiconductor region at or near ground

申请公布号：US8159278(B2)

申请号：US201113178302

申请日期：2011.07.07

申请公布日期：2012.04.17

申请人：

RANKIN SAMUEL PATRICK;DOBKIN ROBERT C.;LINEAR TECHNOLOGY CORPORATION

发明人：RANKIN SAMUEL PATRICK;DOBKIN ROBERT C.

分类号：H03K5/08

主分类号：H03K5/08

摘要：A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio.