METHOD AND DATA TRANSCEIVING SYSTEM FOR GENERATING REFERENCE CLOCK SIGNAL,申请号US20100857754-传众专利搜索

METHOD AND DATA TRANSCEIVING SYSTEM FOR GENERATING REFERENCE CLOCK SIGNAL

申请公布号：US2011311012(A1)

申请号：US20100857754

申请日期：2010.08.17

申请公布日期：2011.12.22

申请人：

CHEN AN-CHUNG;CHENG WEN-LUNG;CHEN WEI-YUNG;PHISON ELECTRONICS CORP.

发明人：CHEN AN-CHUNG;CHENG WEN-LUNG;CHEN WEI-YUNG

分类号：H04L7/00

主分类号：H04L7/00

摘要：A method and a data transceiving system for generating a reference clock signal are provided. The data transceiving system comprises a voltage controlled oscillator, a phase lock loop (PLL) unit, and a data receiver. The voltage controlled oscillator is used to generate a reference clock signal. The PLL unit is used to increase a clock frequency of the reference clock signal to generate a PLL clock signal. The data receiver is used to compare the PLL clock signal with a clock signal of an input data stream, so as to output a voltage adjusting signal to the voltage controlled oscillator. The voltage controlled oscillator adjusts the clock frequency of the reference clock signal to be generated according to the reference clock signal, so as to lock the clock frequency of the PLL clock signal to a base frequency of the clock signal of the input data stream.