WIRING BOARD AND SEMICONDUCTOR DEVICE
申请公布号:JP2011091448(A)
申请号:JP20110023844
申请日期:2011.02.07
申请公布日期:2011.05.06
发明人:NISHIKAWA HIROYUKI;TANAHASHI SHIGEO;HAYASHI KATSURA
分类号:H01L23/12;H01L23/50;H05K1/18;H05K3/46
主分类号:H01L23/12
摘要:<P>PROBLEM TO BE SOLVED: To connect a decoupling capacitor, which suppresses variation of a power supply voltage and a grounding potential inside a semiconductor integrated circuit element, to a semiconductor integrated circuit element and a wiring board, with low resistance and low inductance. <P>SOLUTION: In a wiring board, a build-up layer 130a which is formed by laminating a wiring conductor layer 132 and an insulating layer 131 alternately is formed in at least one side of main surfaces of a core substrate 110, and a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130a. The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component 260, and electrode terminals on a lower surface of the capacitor 121 is connected to a wiring conductor layer 132a on a bottom surface of the cavity 120. This structure enables decoupling capacitor 121 and the semiconductor component 260 to be connected with low resistance and low inductance. <P>COPYRIGHT: (C)2011,JPO&INPIT
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