MANUFACTURING METHOD OF SONOS MEMORY ELEMENT OF TWIN ONO FORM USING INVERSE SELF-ALIGNMENT SYSTEM,申请号JP20100195924-传众专利搜索

MANUFACTURING METHOD OF SONOS MEMORY ELEMENT OF TWIN ONO FORM USING INVERSE SELF-ALIGNMENT SYSTEM

申请公布号：JP2011003921(A)

申请号：JP20100195924

申请日期：2010.09.01

申请公布日期：2011.01.06

申请人：

SAMSUNG ELECTRONICS CO LTD

发明人：LEE YOUNG KYU;HAN JEONG-UK;KANG SUNG-TAEG;LEE JONG-DUK;PARK BYUNG-GOOK

分类号：H01L21/8247;H01L29/792;H01L21/28;H01L21/336;H01L27/115;H01L29/423;H01L29/788

主分类号：H01L21/8247

摘要：PROBLEM TO BE SOLVED: To provide a manufacturing method of a SONOS memory element capable of manufacturing a memory element of SONOS form, capable of intentionally adjusting distribution of electrons and holes generated at programming and erasing, and having a stable 2-bit characteristic even in a memory gate length of ≤0.10 μm by reducing a short channel phenomenon.SOLUTION: By means of a self-alignment system using a spacer, an ONO dielectric layer on the lower part of a gate is formed to have a twin ONO dielectric structure, of which the middle portion is separated and the both separated sides are symmetric. On the middle portion in which the ONO dielectric layer is separated, a gate dielectric layer is formed independently of the ONO dielectric layer.