SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
申请公布号:JPS61129863(A)
申请号:JP19840251376
申请日期:1984.11.28
申请公布日期:1986.06.17
发明人:MISAWA YUTAKA;SAITO OSAMU
分类号:H01L29/78;H01L21/285;H01L21/336;H01L21/768;H01L21/8244;H01L27/10;H01L27/11;H01L29/45
主分类号:H01L29/78
摘要:PURPOSE:To produce the title device speed up by a method wherein the resistance of contact of each wiring with diffused layers is reduced by providing silicide layers at regions where two wirings contact each diffused layer, and the resistance between both wirings is reduced by providing silicide layers so that they may combine these wirings. CONSTITUTION:After a thick oxide film 21 and a thin oxide film 20 are formed on a P type single Si substrate 10, a window 22 is etched away, and an Mo film 23 is adhered over the whole surface. An Mo silicide layer 24 is selectively formed by alloying the Si surface in direct contact with the Mo on heat treatment. Next, Mo portions on the films 20, 21 are selectively removed with aqua regia,thus Mo-silicifying the inside of the window 22 region. Thereafter, a polycrystalline film 30 is adhered over the whole surface, and gate electrodes 31, 32 and a wiring 30 are formed by phosphorus thermal diffusion into the film 30. Successively, source and drain regions made of N<+> layers are formed by As<+> irradiation. An oxide film 25 is adhered and selectively etched away. Afterwards, a polycrystalline Si film 33 is adhered and irradiated with As<+>; then, regions other than the wiring Si 33 which connects the layer 24 is removed by heat treatment.