SHIFT REGISTER CIRCUIT AND IMAGE DISPLAY DEVICE FURNISHED THEREWITH, AND VOLTAGE SIGNAL GENERATING CIRCUIT,申请号JP20060327918-传众专利搜索

SHIFT REGISTER CIRCUIT AND IMAGE DISPLAY DEVICE FURNISHED THEREWITH, AND VOLTAGE SIGNAL GENERATING CIRCUIT

申请公布号：JP2008140522(A)

申请号：JP20060327918

申请日期：2006.12.05

申请公布日期：2008.06.19

申请人：

MITSUBISHI ELECTRIC CORP

发明人：HIDA YOICHI

分类号：G11C19/28;G02F1/133;G09G3/20;G09G3/36;G11C19/00

主分类号：G11C19/28

摘要：<P>PROBLEM TO BE SOLVED: To prevent erroneous operation in a shift register by reducing a voltage stress of a transistor while suppressing increase in the number of signals necessary for the driving and also by suppressing a delay of falling of an output signal. <P>SOLUTION: A unit shift register is equipped with: a transistor Q1 for supplying a clock signal CLK to an output terminal OUT; a transistor Q2 for discharging the output terminal OUT; a transistor Q3 having a gate connected to a first input terminal IN1 for supplying a level of a first voltage signal terminal T1 to a gate (node N1) of the transistor Q1; and a transistor Q4 having a gate connected to a second input terminal IN2 for supplying a level of a second voltage signal terminal T2 to the node N1. A voltage signal which becomes H level by synchronizing with a clock signal /CLK complementary of the clock signal CLK and becomes L level by synchronizing with the clock signal CLK, is input to one of the first and second voltage signal terminals T1, T2. <P>COPYRIGHT: (C)2008,JPO&INPIT