Methods and structure for error correction in a processor pipeline,申请号US20040801209-传众专利搜索

Methods and structure for error correction in a processor pipeline

申请公布号：US7370230(B1)

申请号：US20040801209

申请日期：2004.03.16

申请公布日期：2008.05.06

申请人：

MAXTOR CORPORATION

发明人：FLAKE LANCE

分类号：G06F11/00

主分类号：G06F11/00

摘要：Methods and structures for an improved processor pipeline to eliminate the effect of correctable soft errors on processor/memory pipeline performance. Features and aspects hereof provide that the pipeline is extended by the addition of one or more information correction stages to correct a soft error using the fetched unit of information and the associated error correcting codes. By extending the pipeline, soft error correction does not stall the pipeline and hence system performance is improved in the face of soft errors from an error correcting memory subsystem.