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Self-biased phased-locked loop

申请公布号:US7173461(B2)

申请号:US20050140684

申请日期:2005.05.31

申请公布日期:2007.02.06

申请人:
INTEL CORPORATION

发明人:TAN SWEE BOON;WONG KENG L.

分类号:H03L7/06

主分类号:H03L7/06

摘要:In general, in one aspect, the disclosure describes a phase-locked loop circuit. The circuit includes an oscillator having a first control input and a second control input, wherein the first control input and the second control input act to control output frequency of the oscillator. The circuit further includes a first charge pump and a second charge pump. A first bias generator is coupled to the first control input of the oscillator and can receive electrical input from the first charge pump and the second charge pump. A second bias generator is coupled to the second control input of the oscillator and can receive electrical input from the second charge pump and the first bias generator.

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