Method for verifying adequate synchronization of signals that cross clock environments and system,申请号US20040816799-传众专利搜索

Method for verifying adequate synchronization of signals that cross clock environments and system

申请公布号：US7159199(B2)

申请号：US20040816799

申请日期：2004.04.02

申请公布日期：2007.01.02

申请人：

STMICROELECTRONICS LIMITED

发明人：WARREN ROBERT

分类号：G06F17/50

主分类号：G06F17/50

摘要：The present invention is directed to methods for verifying adequate synchronization of signals that cross clock environments. According to one exemplary method, a circuit under design includes a plurality of functional elements and a plurality of clock environments, and has one or more signals passing from one clock environment to another therein. The method includes the steps of (i) modelling at least one of the functional elements to have an unknown state as an output for a predetermined time after a timing event of a clock signal, (ii) simulating the circuit, and (iii) determining which functional element is a synchronizer to thereby identify if there is a synchronization problem for a signal passing from one clock environment to another.