LAMINATED ELECTRONIC COMPONENT AND ITS MANUFACTURING METHOD,申请号JP20040312452-传众专利搜索

LAMINATED ELECTRONIC COMPONENT AND ITS MANUFACTURING METHOD

申请公布号：JP2006128282(A)

申请号：JP20040312452

申请日期：2004.10.27

申请公布日期：2006.05.18

申请人：

KYOCERA CORP

发明人：SUGIMOTO KOUSHIROU

分类号：H01G4/12;H01G4/30

主分类号：H01G4/12

摘要：PROBLEM TO BE SOLVED: To provide a laminated electronic component which is highly reliable enough to suppress defective insulation or poor reliability due to deformed conductor layer within the electronic component body, and to provide its manufacturing method. SOLUTION: A conductor layer 7 in an effective part 9 is curved, and the effective part 9 is divided into two at equal thickness in the lamination direction. The upper layer side is used for an upper effective part 9a, and the other lower layer side is used for a lower effective part 9b. The plane of the effective conductor layer 7b of the conductor layer 7 in the upper effective part 9a is set to a reference plane 7c. Assuming that the quantity of deformation is tr1 when a part of the conductor layer 7 is farthest from the reference plane 7c in the lamination direction, and that the quantity of deformation is tr2 when the conductor layer 7 in the lower effective part 9b is farthest from the reference plane 7c in the lamination direction, the relationship of tr1/tr2=0.8 to 1.2 is satisfied in this case. COPYRIGHT: (C)2006,JPO&NCIPI