METHOD AND APPARATUS FOR PRE-EMPTIVELY ARBITRATING ON AN ACYCLIC DIRECTED GRAPH
申请公布号:CA2408252(C)
申请号:CA19932408252
申请日期:1993.12.16
申请公布日期:2005.07.26
发明人:OPRESCU, FLORIN
分类号:G06F13/368;G06F13/00;G06F13/36;G06F13/362;G06F13/40;G06F13/42;G06F15/16;G06F15/173;G06F15/177;H04L12/40;H04L12/44;H04L12/56;H04L12/64;(IPC1-7):G06F13/40
主分类号:G06F13/368
摘要:A bus arbitration scheme is implemented in a system where an arbitrary assembly of nodes on a system bus have been resolved into an acyclic directed graph. The hierarchical arrangement of nodes has one node designated a root while all other nodes have established parent-child relationships with the nodes to which they are linked. Each node may have a plurality of connected child ports with a predetermined acknowledgment priority scheme established. Fair bus access arbitration provides for bus granting in a sequence corresponding to the predetermined port priorities allowing all nodes a turn on the bus. The root node may always assert its priority access status to gain bus access which is useful for accommodating a root node which requires isochronous data transfer. Alternatively, a token passing arbitration scheme may be implemented where the token for bus access is passed around the nodes according to the above-described predetermined port priority scheme. Preemptive bus initialization may be triggered by any node upon detection of a necessitating error or addition or removal of a connection to an existing node.