Arrangement for reducing stress in substrate-based chip packages,申请号US20040850832-传众专利搜索

Arrangement for reducing stress in substrate-based chip packages

申请公布号：US2005017354(A1)

申请号：US20040850832

申请日期：2004.05.21

申请公布日期：2005.01.27

申请人：

PAUL JENS;REISS MARTIN

发明人：PAUL JENS;REISS MARTIN

分类号：H01L23/13;H01L23/31;(IPC1-7):H01L21/50;H01L29/40

主分类号：H01L23/13

摘要：An arrangement reduces stress in substrate-based chip packages, in particular of Ball Grid Arrays (BGA) with rear-side and/or edge protection. The chip is firmly connected to a substrate, which is provided on the side that is opposite from the chip with conducting tracks and micro-balls for making electrical contact with the next-higher wiring level. Regular trench-shaped structures are introduced into the substrate on the chip side thereof and at least enclosing the chip, in order to interrupt or shift the thermally induced mechanical stress in the substrate, indicated by the chip.