SEMICONDUCTOR MEMORY
申请公布号:JP2004234704(A)
申请号:JP20030018366
申请日期:2003.01.28
申请公布日期:2004.08.19
发明人:KONO TAKASHI;HAMAMOTO TAKESHI
分类号:H01L21/8242;G11C11/409;G11C11/4091;G11C11/4097;H01L27/108
主分类号:H01L21/8242
摘要:<P>PROBLEM TO BE SOLVED: To attain the reduction of area as to a semiconductor memory, specifically for a DRAM (Dynamic Random Access Memory). <P>SOLUTION: By connecting a sense amplifier driving line S2N to a source of an N-channel MOS transistor 103, voltages Vgs between gates and sources of N-channel MOS transistors 101, 102 become 0 volt since the sense amplifier driving line S2N and a couple of LIO lines are both on the precharge potential VBL even though a control signal LAMPE temporarily becomes H level, then a sub-amplifier does not operate. Consequently, the addition of a circuit constitution for supplying a signal to convey the activation of a row block is not required, and the reduction of area for the semiconductor memory is attained. <P>COPYRIGHT: (C)2004,JPO&NCIPI
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