SMALL AMPLITUDE OUTPUT BUFFER
申请公布号:JP2004222011(A)
申请号:JP20030007722
申请日期:2003.01.16
申请公布日期:2004.08.05
发明人:YOSHIDA SHINYA
分类号:H03K17/16;H03K17/687;H03K19/0175;(IPC1-7):H03K19/017
主分类号:H03K17/16
摘要:PROBLEM TO BE SOLVED: To reduce the generation of noise within a chip and to exclude influences of the noise on an analogue circuit on the chip or the like by suppressing an output amplitude of an output buffer. SOLUTION: A small amplitude output buffer 10 is constituted by inserting a PMOS transistor which is diode-connected, an inverter 13 and a diode connected NMOS transistor 12 serially between a power source VDD and a ground VSS and by connecting a resistance element 14 between a power source terminal and a ground terminal of the inverter 13. COPYRIGHT: (C)2004,JPO&NCIPI
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