Method, circuit and system for determining burn-in reliability from wafer level burn-in,申请号US20020207526-传众专利搜索

Method, circuit and system for determining burn-in reliability from wafer level burn-in

申请公布号：US2004019838(A1)

申请号：US20020207526

申请日期：2002.07.29

申请公布日期：2004.01.29

发明人：MARR KENNETH W.

分类号：G01R31/26;G01R31/28;G01R31/3185;G11C29/00;G11C29/12;G11C29/44;(IPC1-7):H01L21/66

主分类号：G01R31/26

摘要：A method, circuit and system for determining burn-in reliability from wafer level burn-in. The method according to the present invention includes recording the number of failures in each IC die in nonvolatile elements on-chip at points in time over the duration of wafer level burn-in testing. The number of failures in each IC die, along with their associated points in time, may be used to create burn-in reliability curves which are conventionally derived using other processes that may be less cost effective or not possible to effect with unpackaged IC dice. Circuits and systems associated with the method of the present invention are also disclosed.