VOLTAGE GENERATION CIRCUIT FOR PERI AND SEMICONDUCTOR MEMORY DEVICE COMPRISING THE SAME AND VOLTAGE GENERATION METHOD,申请号KR20010049038-传众专利搜索

VOLTAGE GENERATION CIRCUIT FOR PERI AND SEMICONDUCTOR MEMORY DEVICE COMPRISING THE SAME AND VOLTAGE GENERATION METHOD

申请公布号：KR20030015002(A)

申请号：KR20010049038

申请日期：2001.08.14

申请公布日期：2003.02.20

申请人：

SAMSUNG ELECTRONICS CO., LTD.

发明人：KIM, JAE HUN;YOON, JAE YUN

分类号：G11C11/413;G11C5/14;(IPC1-7):G11C5/14

主分类号：G11C11/413

摘要：PURPOSE: A voltage generation circuit for PERI and a semiconductor memory device comprising the same and a voltage generation method are provided, which operates by receiving a bank address to prevent unnecessary power consumption, and supply an internal voltage to a peripheral circuit by receiving the bank address. CONSTITUTION: A control unit(110) generates a control signal(CTRLS) in response to a bank enable signal(BAIF) and a bank enable command(BACT) enabling memory banks storing data. And an internal voltage generation unit(120) responds to the control signal, and outputs an internal voltage of the same level as a reference voltage by receiving the reference voltage. The above control signal is enabled when the bank enable command and the bank enable signal are enabled at the same time. The bank enable signal is generated in response to the bank address.