HEAD SWITCH CONTROLLER AND HEAD SWITCH CONTROLLING METHOD
申请公布号:JP2002218371(A)
申请号:JP20010006440
申请日期:2001.01.15
申请公布日期:2002.08.02
发明人:FUJII NORIYUKI
分类号:H04N5/783;G11B15/14;H04N5/7826;(IPC1-7):H04N5/782
主分类号:H04N5/783
摘要:<p>PROBLEM TO BE SOLVED: To solve the problem of the work efficiency being low, because the resistance is trimmed manually and a problem that highly accurate adjustment of SW point has been difficult due to variation in the amount of delay. SOLUTION: A system controller 10 acquires rise timing D-FG being inputted from a rotary drum 41a in an automatic adjustment mode of SW point, detects V-sync from C-sync inputted from a video IC 30, calculates a DELAY amount, such that RF-SW rises or falls with a timing lead by 6.5H(+2H) ahead of the falling timing of the V-sync by counting clock pulses and stores the calculated DELAY amount in an EEPROM 60. Consequently, SW point can be adjusted with high accuracy.</p>
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