Method for forming diffusion barrier layers
申请公布号:US6069073(A)
申请号:US19980126094
申请日期:1998.07.30
申请公布日期:2000.05.30
发明人:KIM, YOUN TAE;JUN, CHI HOON;BAEK, JONG TAE
分类号:C23C14/58;C23C28/00;H01L21/285;H01L21/768;(IPC1-7):H01L21/28
主分类号:C23C14/58
摘要:An improved method for forming diffusion barrier layers for sub-micron connects in integrated circuits is disclosed. The dual diffusion barriers is easily formed according to two-step annealing processes. The anneal includes two anneal cycles or steps, each cycle is performed at a separate and distinct temperature cycles. Each cycle is performed in the presence of ammonia (NH3) or nitrogen ambient. As a result of the first low-temperature cycle, a nitridation occurs at the upper surface to form a binary diffusion barrier layer. As a result of the second high-temperature cycle, an out-diffusion of silicon ions occurs at the lower surface to form a ternary alloys. The dual diffusion barriers obtained by a simple and easy two-step anneal processing exhibits an improved barrier performance. Furthermore, it is possible to form highly stable multilevel interconnections without any deterioration problems by reducing the sophisticated processing steps.
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