Method and apparatus for analyzing failure of semiconductor wafer,申请号US19960678879-传众专利搜索

Method and apparatus for analyzing failure of semiconductor wafer

申请公布号：US5828778(A)

申请号：US19960678879

申请日期：1996.07.12

申请公布日期：1998.10.27

申请人：

MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

发明人：HAGI, TOSHIO;NAKATA, KAZUKI

分类号：G06T7/00;H01L21/66;(IPC1-7):G06K9/00

主分类号：G06T7/00

摘要：If a first pattern defect is detected at the (n-2)th step, a pattern defect is retrieved at the (n-1)th step. It is decided that all pattern defects detected at the (n-1)th step in a predetermined region where the first pattern defect is detected are generated at the (n-2)th step. If second and third pattern defects are detected in other regions than the predetermined region, it is decided that the second and third pattern defects are generated at the (n-1)th step. Then, a pattern defect at the n-th step is retrieved. It is decided that all pattern defects detected at the n-th step in a predetermined region where the second and third pattern defects are detected at the (n-1)th step are generated at the (n-1)th step. If fourth, fifth and sixth pattern defects are detected in other regions than the predetermined region where the second and third pattern defects are detected, it is decided that the fourth, fifth and sixth pattern defects are generated at the n-th step.