Read timing method and circuit for nonvolatile memories.
申请公布号:EP0668591(A1)
申请号:EP19940830074
申请日期:1994.02.18
申请公布日期:1995.08.23
发明人:PASCUCCI, LUIGI;PADOAN, SILVIA;GOLLA, CARLA MARIA;MACCARRONE, MARCO;OLIVO, MARCO
分类号:G11C17/00;G11C7/10;G11C7/22;G11C16/02;G11C16/32;(IPC1-7):G11C7/00;G11C16/06
主分类号:G11C17/00
摘要:<p>The circuit (1) comprises a section (2) generating a pulse signal (ATD) for asynchronously enabling the read phases; a section (4) generating precharge (PC) and detecting (DET) signals of adjustable duration, for controlling data reading from the memory (104) and data supply to the output buffers (106); a section (5) generating a noise suppressing signal (N) for freezing the data in the output buffers during loading into the output circuits, and the duration of which is exactly equal to the propagation time of the data to the output circuits of the memory, as determined by propagating a data simulating signal (SP) in an out-like circuit (33); a section (6) generating a loading signal (L), the duration of which may be equal to that of the noise suppressing signal (N) or extended by an extension circuit (51) in the event the array presents slower elements which may thus be read; and a section (7) generating a circuit reset signal (END). <IMAGE></p>
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