Three-dimensional multichip packages and methods of fabrication.
申请公布号:EP0531723(A1)
申请号:EP19920113573
申请日期:1992.08.10
申请公布日期:1993.03.17
发明人:BERTIN, CLAUDE LOUIS;FARRAR, PAUL ALDEN, SR.;KALTER, HOWARD LEO;KELLEY, GORDON ARTHUR, JR.;VAN DER HOEVEN, WILLEM BERNARD;WHITE, FRANCIS ROGER
分类号:H01L27/00;H01L25/065;H01L25/07;H01L25/18
主分类号:H01L27/00
摘要:<p>A fabrication method and resultant three-dimensional multichip package having a densely stacked array of semiconductor chips interconnected at least partially by means of a plurality of metallized trenches are disclosed. The fabrication method includes providing an integrated circuit chip (50) having high aspect ratio metallized trenches (62) therein extending from a first surface to a second surface (58) thereof. An etch stop layer is provided proximate the termination position of the metallized trenches with the semiconductor substrate (52). Next the integrated circuit device is affixed to a carrier (70) such that the surface of the supporting substrate is exposed and substrate is thinned from the integrated circuit device until exposing at least some of the plurality of metallized trenches therein. Electrical contact can thus be made to the active layer of the integrated circuit chip via the exposed metallized trenches (66). Specific details of the fabrication method and the resultant multichip package are set forth. <IMAGE></p>
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