Circuit arrangement for the digital processing of signals of the SECAM and PAL colour television standards,申请号DE19883808830-传众专利搜索

Circuit arrangement for the digital processing of signals of the SECAM and PAL colour television standards

申请公布号：DE3808830(A1)

申请号：DE19883808830

申请日期：1988.03.14

申请公布日期：1989.09.28

申请人：

AKADEMIE DER WISSENSCHAFTEN DER DDR, DDR 1086 BERLIN, DD

发明人：KIRMSE, WILFRIED, DIPL.-ING. DR.-ING., DDR 1120 BERLIN, DD;SCHMELOVSKY, KARL-HEINZ, PROF. DIPL.-PHYS. DR., DDR 1020 BERLIN, DD;STROETZEL, KARL-HEINZ, DIPL.-ING., DDR 1130 BERLIN, DD;SCHLESIER, HORST, DIPL.-ING., DDR 8090 DRESDEN, DD

分类号：H04N9/64

主分类号：H04N9/64

摘要：The invention relates to a circuit arrangement for the digital processing of signals of the SECAM and PAL colour television standards by means of a video processor for obtaining the luminance and chrominance information from a digitized compound colour video signal. The circuit arrangement can be easily integrated and thus enables complex highly integrated digital circuits to be constructed. It is the aim of the invention to combine the signal processing stages with one another in such a manner that the greatest possible common utilization of the assemblies and thus minimum chip area requirement is ensured. At the same time, optimum quality for both types of modulation must be ensured and the basis formed for a uniform digital SECAM/PAL video processor. The invention therefore achieves the object of specifying a circuit arrangement for the digital processing of signals of the SECAM and PAL colour television standards which implements digital video signal processing of the SECAM and PAL colour television standards which implements digital video signal processing of the SECAM and PAL colour television standards with only a single system clock frequency which is coupled to colour subcarrier, by suitably combining individual signal processing stages and by using adaptable digital modules for signal filtering and signal delay. The required functions for synchronizing the deflection, the raster equalization, the colour and standard detection, the colour synchronization and the clock supply are allocated to a known synchronous processor, which ... Original abstract incomplete. <IMAGE>