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Pipelined computer

申请公布号:US4847753(A)

申请号:US19870072708

申请日期:1987.07.13

申请公布日期:1989.07.11

申请人:
MITSUBISHI DENKI K.K.

发明人:MATSUO, MASAHITO;YOSHIDA, TOYOHIKO

分类号:G06F9/38;G06F12/08

主分类号:G06F9/38

摘要:A pipelined computer includes an instruction cache connected to an instruction prefetch queue for storing a target address and a target instruction, with the address of a branch instruction taken as an index, and a comparator for comparing a predicted target address stored in the instruction cache with a real target address determined upon execution of the branch instruction. When both the target addresses agree in the comparator, the decoding unit and the instruction prefetch queue continue pipeline processing without alteration.

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