CIRCUIT FOR REARRANGING MULTIPLEXING DATA IN OBLIQUE DIRECTION
申请公布号:JPS63292737(A)
申请号:JP19870127451
申请日期:1987.05.25
申请公布日期:1988.11.30
发明人:OKUHARA YASUHIKO
分类号:H04H20/00;H04H20/74;H04J3/00
主分类号:H04H20/00
摘要:PURPOSE:To attain the rearrangement of data without using an expensive processing circuit capable of processing at high speed by providing an address conversion ROM to convert the order of the transfer of a data bit into the order of arrangement. CONSTITUTION:A ROM write address corresponding to the bit arrangement order in a transfer data bit group is stored in consecutive addresses corresponding to the order of the transfer of each data bit in the transfer data bit group in address conversion ROMs 11a-11n installed corresponding to a possible combination of the data transfer channel of each row constituting one super- frame respectively. A RAM address assigned in the order of data bit is read consecutively from one of the ROM selected among the conversion ROMs 11a-11n by a ROM selection circuit 13 and fed as a data write address to one of data RAMs 14, 15 of 2-bank constitution via one of the selectors 17, 18 and it is not required to use a high speed and expensive processing circuit.