SIDEWALL SPACERS FOR CMOS CIRCUIT STRESS RELIEF/ISOLATION AND METHOD FOR MAKING,申请号CA19870529768-传众专利搜索

SIDEWALL SPACERS FOR CMOS CIRCUIT STRESS RELIEF/ISOLATION AND METHOD FOR MAKING

申请公布号：CA1245373(A)

申请号：CA19870529768

申请日期：1987.02.16

申请公布日期：1988.11.22

申请人：

INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人：DALLY, ANTHONY J.;OGURA, SEIKI;RISEMAN, JACOB;ROVEDO, NIVO

分类号：H01L21/76;H01L21/762;(IPC1-7):H01L21/76;H01L27/04

主分类号：H01L21/76

摘要：<p>Sidewall Spacers For CMOS Circuit Stress Relief Isolation And Method For Making A method for forming fully recessed (planar) isolation regions on a semiconductor for the manufacture of CMOS integrated circuits, and the resulting semiconductor structure, comprising in a P doped silicon substrate with mesas formed therein, forming low viscosity sidewall spacers of borosilicate glass in contact with the sidewalls of those mesas designated to have N-channel devices formed therein; then filling the trenches in the substrate adjacent to the mesas with TEOS; and heating the structure until the boron in the sidewall spacers diffuses into the sidewalls of the designated mesas to form channel stops. These sidewall spacers reduce the occurrence of cracks in the TEOS by relieving internal mechanical stress therein and permit the formation of channel stops via diffusion, thereby permitting mesa walls to be substantially vertical.</p>