HIGH SPEED SET-RESET FLIP-FLOP

申请公布号：US3671768(A)

申请号：USD3671768

申请日期：1966.10.31

申请公布日期：1972.06.20

申请人：

RCA CORP.

发明人：MICHAEL COOPERMAN

分类号：H03K3/037;(IPC1-7):H03K3/26;G11C19/00;H03K19/30

主分类号：H03K3/037

摘要：A two input OR gate with resistive feedback between the output terminal and one of the input terminals of the OR gate. The second input terminal of the OR gate serves as s the set input terminal to the flip-flop and is normally maintained at a level indicative of a binary " 0" . To set the flip-flop, a voltage indicative of a 1 is momentarily applied to this set terminal. To reset the flip-flop, a voltage indicative of a zero is momentarily applied to the reset terminal of the flip-flop. The latter is coupled through a level shift circuit, including active element means, to the first input terminal of the OR gate.

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