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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

申请公布号:JPS6068627(A)

申请号:JP19830177339

申请日期:1983.09.26

申请公布日期:1985.04.19

申请人:
MATSUSHITA DENKI SANGYO KK

发明人:AONO KUNITOSHI;YAMADA HARUYASU;HASEGAWA KENICHI;MORI TOSHIKI

分类号:H01L21/331;H01L21/74;H01L21/8222;H01L27/06;H01L29/73;H01L29/732

主分类号:H01L21/331

摘要:PURPOSE:To almost zero delay of signal due to the collector-to-substrate junction capacitance of a bipolar transistor and to enable to operate the titled device at higher speed by a method wherein a one conductive type high-pressure layer is provided between a one conductive type collector buried layer and another conductive type semiconductor substrate. CONSTITUTION:A collector-to-substrate junction capacitance Crs'15, which is formed by joining a P type semiconductor substrate 1 and an N<-> type high-resist ance layer 13 together, becomes smaller than in the conventionl method, because one way of the jointed both is the N<-> type high-resistance layer 13. A resistance 14 due to the N<-> type high-resistance layer 13 is a resistance component ranging from the junction face to the interface between the high-resistance layer 13 and an N<+> type buried layer 2, that is, a collector-to-substrate resistance rcs. Accordingly, when the collector-to-substrate resistance rcs is made larger than the load resistance, delay of signal due to the collector-to-substrate capacitance Crs' is reduced as small as to be able to almost ignore.

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