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SYSTEM FOR RECORDING SCRAMBLED DIGITAL SIGNALS AND PLAYBACK SYSTEM THEREFOR

申请公布号:CA1201201(A)

申请号:CA19820408446

申请日期:1982.07.30

申请公布日期:1986.02.25

申请人:
VICTOR COMPANY OF JAPAN, LIMITED

发明人:MASUDA, ISAO;TAKAHASHI, NOBUAKI;NISHIKAWA, KAZUNORI;IWASAKI, YOSHIKI;KOMURA, MAKOTO

分类号:G11B20/10;G11B20/18;(IPC1-7):G11B20/10

主分类号:G11B20/10

摘要:<p>A digital signal is organized into a sequence of frames each comprising digital words containing data information and frame synchronization information. A digital scrambling word having a predetermined bit pattern is generated by a data scrambler for each frame signal at the termination of a frame sync word. The scrambling word is modulo-2 summed with the data information word to randomize each frame signal to the exclusion of the frame sync word. The randomized signal and a replica of the data information word are frequency modulated and the so modulated signal is recorded on a recording medium. Upon reproduction, the recorded signal is frequency demodulated to recover the scrambled frame from which clock pulses are regenerated and the frame sync word is detected. A data de-scrambler generates a digital de-scrambling word when there is a phase match between the detected frame sync word and the clock signal. The de-scrambling word is modulo-2 summed with the scrambled information word to recover a replica of the original digital signal.</p>

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