WHITE LINE SKIP TYPE FACSIMILE EQUIPMENT
申请公布号:JPS59144274(A)
申请号:JP19830019305
申请日期:1983.02.07
申请公布日期:1984.08.18
发明人:NAKASAKI YASUO
分类号:H04N1/413;H04N1/17;H04N1/41
主分类号:H04N1/413
摘要:PURPOSE:To simplify hardware constitution and to shorten a transmission time by sending two white lines within the minimum transmission time of one line. CONSTITUTION:When the initialization of an encoder 1 is completed, a picture signal transfer request C is turned on and a picture signal part turns on a line synchronizing signal B to tranfer a picture signal A to the encoder 1. The encoder 1 reads the picture signal A and performs encoding processing to transfer code data D to a circuit part. A D.FF6 holds the picture signal A when there is the picture signal A while the signal B is on, and a D.FF7 outputs th result of the D.FF6 to a selector 4 to stop a picture signal transfer clock J. The encoder 1 sends bits Fill to the circuit part until the output H of the selector 4 turns on when the output H is off. In this case, outputs I1 and I2 of a counter are switched according to the output F of a change-point detecting circuit 2 unless a change point is detected, and the selector 4 decreases the number of counting stages of the counter 3.
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