DIVIDING CIRCUIT,申请号JP19820202944-传众专利搜索

DIVIDING CIRCUIT

申请公布号：JPS5994143(A)

申请号：JP19820202944

申请日期：1982.11.19

申请公布日期：1984.05.30

申请人：

TOSHIBA KK

发明人：SAKAMOTO TSUTOMU

分类号：G06F7/537;G06F7/00;G06F7/483;G06F7/507;G06F7/52;G06F7/535

主分类号：G06F7/537

摘要：PURPOSE:To use a dividing circuit for the data processing of one word length and the data processing of multi word length, by combining the first dividing circuit, which processes data of one word length, and the second dividing circuit having a similar function. CONSTITUTION:The dividing circuit consists of dividing circuits 1 and 2 which process data of one word length. In case that a quotient of one word length is obtained, upper bits Ru of a dividend are set to a UR register 10, an LR register 20, a UQ register 11, and an LQ register 21. A divisor D is set to a UV register 12 and an LV register 22. The overflow is detected in the circuit 2 by an LA adding circuit 25 simultaneously with the normalizing processing of the divisor D in the circuit 1. In case of the floating point division of multi word length, the dividend and the divisor are set to registers similarly, and a UA added 15 and an LA adder 25 are connected through a selector SEL to perform addition. Processing results in adders 15 and 25 are sent to an S bus.