CLOCK RADIO WITH VOICE SYNTHESIZATION
申请公布号:JPS58127194(A)
申请号:JP19820009605
申请日期:1982.01.26
申请公布日期:1983.07.28
发明人:HAGITANI SHINICHI
分类号:G04G13/02;G04G13/00;G04G99/00;G10L13/00
主分类号:G04G13/02
摘要:PURPOSE:To generate a continuous voice with a simple construction by controlling the startup of a voice synthesizer with the rectification of the voice signal therefrom. CONSTITUTION:A voice signal with a voice synthesization circuit 5 and a voice signal amplification circuit 6 is applied to a speaker 14 while rectified with a rectification circuit made up of capacitors 7 and 10, diodes 8 and 9 and the like to generate a high-level rectified output, which turns off a transistor 12. Consequently, a starting signal applied to the circuit 5 through the transistor 12 goes to so high a level that the circuit 5 fails to start and hence, the synthesized voice signals are outputted continuously. The outputting of a voice signal for one phrase or the like ends and after a specific time according to a time constant passes, the rectified output goes to a low level. This allows the transistor 12 to be turned on to apply a low level starting signal to the circuit 5 for restarting. Thus, it is possible to obtain a clock radio with a voice synthesization which can generate a continuous voice with a simple construction.
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