CLOCK SYNCHRONOUS CIRCUIT FOR TWOOWAY TRANSMISSION

申请公布号：JPS5383412(A)

申请号：JP19760158654

申请日期：1976.12.28

申请公布日期：1978.07.22

申请人：

FUJITSU LTD

发明人：IISAKU SHIYUNICHI;MURAKAMI KOUZOU

分类号：H04J3/06;H04L7/00

主分类号：H04J3/06

摘要：PURPOSE:To prevent the malfunction of PLL caused by detouring as well as the fluctuation of PLL action, by controlling the gate circuit at the slave station of the two-way transmission system.

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