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SEMICONDUCTOR SYSTEM

申请公布号:WO2001056038(P1)

申请号:JP2000000430

申请日期:2000.01.28

申请公布日期:2001.08.02

摘要:<p>A module of memory chips includes a test chip that comprises an ALPG for generating test memory patterns (addresses and data) according to a predefined algorithm, a decision circuit for comparing data written in memory with data read from memory, and storage means for storing the results of comparison (defect addresses).</p>

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